Start with the student’s own question
Most young people who build robots or electronics assemble a standard microcontroller and write code for it. The chip inside is somebody else’s. Magellan Silicon starts one level deeper. A student brings a question of their own—can a purpose-built circuit cut the latency and energy of a robot’s sensor processing under stated conditions; can a wake-up detector run for years on a coin cell; can a tiny circuit make each device uniquely identifiable; can a sensor front end make an environmental project more reliable—and the programme helps them answer it with a chip they design themselves.
Because the question is the student’s own, so is the work that follows: the design decisions, the trade-offs, the measurements and the story. That is what showcases, competition judges and university readers respond to, and it is why every Magellan Silicon project begins with the question rather than with a kit.
Design, verify, prototype, fabricate, measure
Magellan Silicon is a twelve-week programme followed by fabrication. Weeks one to four build the foundations: how logic becomes hardware, how to describe a design, how to test it. Weeks five to eight are spent on the student’s own project, running on an FPGA so that it works on the desk long before any silicon exists. Weeks nine to twelve cover verification, documentation and the engineering notebook. In week thirteen the design is submitted for fabrication on a shared wafer; the packaged chip and its development board arrive about six to nine months later, and the student measures their silicon against their simulation.
Each student works with an engineer-mentor from the group’s Taipei team in one-to-one sessions, alongside a small weekly group. The mentor reviews, questions and signs off; the student designs. See the week-by-week programme and calendar ↗
To see what a finished project looks like before you begin, read the worked example: Tick-to-Signal, a chip that turns a stream of market prices into a trading signal in one clock cycle ↗. Every student’s project differs from it; the example shows the method, the measurements and what a family can expect.
Week by week
The programme is twelve weeks of weekly ninety-minute group sessions (six to eight students) and ten hours of one-to-one mentoring, followed by fabrication. The sequence is the same for every student; the project is their own. The worked example, Tick-to-Signal, shows how one project maps onto these weeks.
| Weeks | Focus | What happens |
|---|---|---|
| 1–2 | How logic becomes hardware | Gates, timing and the idea of a design that is “built” rather than “run”. First exercises in the browser studio; the AI assistant explains and checks. |
| 3–4 | Describing a design | From drawn logic to a hardware description. Simulation, test benches, and reading the results. The student’s question is chosen and scoped with the mentor. |
| 5–6 | The project, on an FPGA | The student’s design runs on a development board on their desk. Iteration, debugging, and the first entries of the engineering notebook. |
| 7–8 | Making it work well | Area, timing and power trade-offs; what will and will not fit on the allocated silicon; design decisions recorded as they are made. |
| 9–10 | Verification | Coverage, corner cases, and the checks the fabrication route requires. Mentor review and sign-off. |
| 11–12 | Documentation and showcase | Design document, disclosure statement and project page. Cohort showcase of the FPGA prototypes. |
| 13 | Fabrication | Designs are submitted together on two booked routes. Families receive the submission record and the expected return window. |
| +6–9 months | Silicon returns | Packaged chips and boards arrive. Measurement against simulation; results added to the project page. Outcomes-pack sessions begin for those who chose them. |
What a student produces
- A working FPGA prototype of their design, demonstrated at the cohort showcase.
- A complete design, entered, simulated, verified and checked for fabrication on the Studio, Magellan Global’s own AI-assisted design-automation platform—with no commercial EDA licence to buy.
- A design submitted for fabrication, and later the packaged chip with its development board.
- An engineering notebook recording decisions, failures and measurements as they happened.
- A design document in the format used by science fairs and student journals.
- A disclosure statement listing mentor and AI involvement, generated from the studio’s own records.
- A public project page (with the family’s consent) and a certificate of completion.
- A finished project in the form that science fairs, open-hardware robotics competitions and student journals expect—so the student can go on to the regional ISEF-affiliated fair, WRO Future Innovators or RoboCupJunior Rescue Maze, or a first publication, and, where the work matures into research, towards Regeneron ISEF and professional venues. Where the project can go, with eligibility ↗
Calendar
Cohorts are timed to the fabrication schedule so that every design goes out on a confirmed run.
| Cohort | Enrolment | Programme | Fabrication | Chips expected | Showcase & competitions |
|---|---|---|---|---|---|
| Spring 2027 | January–February | March–May | June | December 2027–March 2028 | Cohort showcase in June; local fairs from January 2028; outcomes-pack work on return of silicon |
| Autumn 2027 | July–August | September–November | Late November | June–August 2028 | Cohort showcase in December; national fairs and journal submissions from mid-2028 |
Dates follow the fabrication partners’ published schedules and are confirmed for each cohort before enrolment opens.
Formats, and how to join
Magellan Silicon is offered as a twelve-week programme delivered online with small weekly groups and one-to-one mentoring, in English with Mandarin-language groups for the first cohorts in Singapore, Taiwan and Hong Kong. The outcomes pack adds publication and competition support after the chip returns. The Taipei silicon week is an optional in-person week. A schools edition supports a teacher-led cohort with mentor support and a fabrication allocation. Cohorts open twice a year and are timed to the fabrication schedule; places in each cohort are limited by mentor capacity.
Under-18 participants enrol through a parent or guardian account. We collect the minimum information needed to deliver the programme, keep AI assistant logs for the student’s own disclosure and for the group’s research only with consent, and arrange any travel for the Taipei week with WG Global’s specialists. Fees, eligibility and other questions ↗
Who does what
Magellan Global leads the programme and the family relationship. MTRI co-develops the Magellan Silicon Studio and its AI assistant with the group and carries the research on how young people learn to frame problems with AI. The group’s Taipei engineering team provides mentors, fabrication coordination, packaging and measurement. AJPE supports families who wish to connect the project with education planning. WG Global arranges travel for the Taipei silicon week. LegalMatrix maintains the student intellectual-property policy: students keep the copyright in their designs and grant the programme a licence to showcase and, with consent, to include the design in the open registry.